1. Field
Embodiments relate to a memory device. More particularly, embodiments relate to a data read method for a multi-level cell memory employable for reading, e.g., 2-bit data.
2. Description of the Related Art
Extensive research is being conducted on multi-level cells to increase the integration density of nonvolatile memory devices. Multi-level cells are memory elements that are adapted to store more than a single bit of data. A multi-level cell may have a plurality of read windows, e.g., three read windows, which may be distinguished based on a plurality of threshold voltage states, e.g., four threshold voltage states for 2 bit data. In such multi-level memory cells, during a read operation, a data read voltage corresponding to at least three of the first, second, third and fourth threshold voltage states is sequentially applied and current flow or a lack thereof may be determined, respectively. Therefore, in such embodiments, during each data read operation, time must be allocated for each of the at least three sequential data read voltage states.